Semiconductors are again in the crosshairs of U.S. policymakers over national security concerns about China’s role in the open-source semiconductor architecture known as RISC-V. In November, 2023, members of the U.S. Congress’s China Select Committee sent a letter to Commerce Secretary Raimondo, calling on the Department to use export control rules to prohibit U.S. firms from participating in RISC-V as they think Chinese participants use RISC-V to support China’s geopolitical interests. RISC-V is one the few international standards for managing the complex interface (the so-called instruction set architecture (ISA)) between the software and hardware of semiconductors that tells the ‘chip’ what to do. It’s a complex topic, to be sure, but it appears some U.S. policymakers misunderstand what happens at standards discussions, what the RISC-V standard is, and how it’s used by firms. Preventing U.S. firms from participating in RISC-V would harm U.S. innovation and competitiveness and aid China.

RISC-V: Understanding the Difference Between the Standard vs. Implementation of the Standard

RISC-V, fully known as "Reduced Instruction Set Computing V" (the “V” represents the fifth version of the RISC architecture) is a technical standard that dictates the instructions the hardware transmits to the software. The telecommunications sector equivalent is 3GPP standards for devices to interact with each other over a network. RISC-V originated at the University of California, Berkeley in 2011. RISC-V is managed by RISC-V International, the non-profit home of the RISC-V standard, related specifications, and stakeholder community, which involves 3,950 members across 70 countries.

There are three leading semiconductor architectures: Intel’s x86, ARM (a British semiconductor and software design company), and RISC-V. Most desktops, laptops, and servers are based on the x86 architecture. Meanwhile, ARM has 90 percent of the market for smartphone, tablet, and laptop processors. Many U.S. and Chinese firms participate in RISC-V but also have licenses to use Intel and/or ARM. ARM and x86, despite being proprietary and costing money to license, are publicly accessible. A key point which gets to the critical difference between a standard and its implementation, as per below, is that there are very few firms (such as Apple and Qualcomm) able to build competitive solutions in both the ARM and x86 architectures.

RISC-V is an open standard, meaning that anyone may use RISC-V as a building block in their open or proprietary products and services. RISC-V has attracted global attention and support due to its relative simplicity, the low barrier to entry to using it, and its cost competitiveness. RISC-V is attractive to startups and small and medium-sized firms as they can implement RISC-V without paying for licensing proprietary architectures. RISC-V is a work in progress and still has a way to go to seize significant market share from x86 and ARM. SHD Group (a market research firm) estimates that that by 2030, RISC-V chips could account for 25 percent of the system-on-chip sector. Despite its formative stage, many American, European, and other firms are helping to develop RISC-V as they recognize the value of having another option for semiconductor architecture so that they are not dependent on any one standard. Intel supports RISC-V even though it competes with its x86 standard, in part, as while it competes with x86 it also represents a future business opportunity in terms of building foundries to produce RISC-V-using semiconductors. For instance, Meta is using RISC-V to power some of its AI computing. In October 2023, Google announced a partnership with Qualcomm to launch RISC-V based wearable devices. In November 2023, Google’s research division released a set of open-source tools for AI and machine-learning based on RISC-V. Many firms have made a long-term commitment to RISC-V as it takes years to develop and deploy a new semiconductor architecture and to integrate and refine it so that it works efficiently and effectively with new products.

To be sure, China is actively embracing and innovating with RISC-V technology. The top ten RISC-V startups in China have funding totaling over $1 billion. For example, on November 24, 2023, DAMO Academy (Alibaba’s research division), unveiled three RISC-V-based processors. China supports RISC-V for all the same reasons as other countries. This Jamestown Foundation article analyzes China’s strategy for RISC-V. China supports RISC-V due to the exact scenario that the China Select Committee wants to create—China wants to reduce its dependency on semiconductor products, providers, and standards that the United States could use sanctions and export controls to target and cut them off from.

U.S. policymakers are motivated by the fact that Chinese firms are interested and engaged in RISC-V. There is no specific incident that raised national security concerns. This is not the first time RISC-V has been ensnarled in the debate over semiconductors and U.S. national security concerns. In 2020, RISC-V International shifted incorporation from the United States to Switzerland due to concerns about whether it would breach U.S. sanctions targeting Huawei and other Chinese firms given they are RISC-V members. Many U.S.-based standards bodies have shifted overseas for the same reason.

U.S. policymakers want to restrict U.S. firms’ participation in RISC-V as they misunderstand what the standard is and does and what happens when U.S. firms and experts attend RISC-V standards meetings along with Chinese participants. Some U.S. policymakers think that standard discussions like RISC-V involve the disclosure of confidential information about technology; in essence, that it involves the transfer of sensitive technology and know-how. Technical standards discussions typically involve discussions about technical functionality. In the case of RISC-V, it provides a standard to allow different firms to write software so that it will run on any product that complies with the ISA.

The RISC-V standard does not involve sensitive technology. Standards discussion can involve confidential information, but this typically requires companies to explicitly give away or license the intellectual property (IP) in such cases. As RISC-V is a “free” standard, it means firms would have to give away the IP for free, which in turn means most firms won’t contribute anything sensitive. As RISC-V states in its response to the Select Committee’s letter, “Development of RISC-V specifications is based on contributions that have been made available on a non-proprietary basis…RISC-V International does not provide chip design, open source cores, proprietary IP, or implementations, but rather publishes a set of commonly used global open standards. These published standards contain no more information than what is already published by proprietary architectures.”

Particularly, policymakers misunderstand the critical difference between the RISC-V standard and how firms implement it and what this means in terms of a firm’s underlying technology. RISC-V creates an architecture and helps enable a level playing field in software. While the standard (as its name makes clear) is standardized, the implementation of the standard varies by firm. The standard does not include any implementation information. Every firm implements the standard for their semiconductor architecture in their own way. In many ways, RISC-V provides greater design flexibility for firms as its base package only includes 47 instructions, while mature ISAs like x86 and ARM have over 1000. Firms have more options to implement RISC-V depending on whether it’s for small scale, simple technologies as opposed to highly sophisticated, high-performance capabilities, such as for AI compute. As RISC-V points out in its statement, “Competition [between firms that use RISC-V] does not happen at the standards level, but rather competition is at the implementation level.” Chinese firms, as well as U.S. firms and those from elsewhere around the world, develop their own implementation of the RISC-V architecture. China’s participation in RISC-V does not grant Chinese entities’ access to more advanced semiconductor technology. It does not change their ability to design and produce their own semiconductors.

It’s the implementation of the chosen architectural standard that makes the software and hardware involved in semiconductors work in some particular way which makes a firm’s products competitive and innovative. Semiconductor chip performance depends on a complex interplay between architecture, microarchitecture, implementation, manufacturing, and software. Firms differentiate through microarchitecture and implementation, while related semiconductor foundry technology impacts the manufacturing phase. For example, the Intel Pentium and AMD Athlon chips implement nearly identical versions of the x86 ISA, but they have radically different internal designs. A firm’s microarchitecture implementation is the key intellectual property associated with their competitive and innovation advantages. Each firm’s implementation of the standard provides the “secret sauce” of their products and business models.

U.S. industry experts think that China’s RISC-V implementations don’t perform particularly well, not due to the architecture, but because getting implementation right is a long and complicated process. In addition, without access to leading node foundry technology, China will not catch up on end product performance even if it has a comparable implementation. China is only a few years into the decade-plus time it typically takes firms to truly master the implementation of a semiconductor architecture. Forcing U.S. firms out of RISC-V will not stop Chinese and other firms from using RISC-V. But it will cede the potential field for innovation in terms of RISC-V implementation to Chinese firms.

American, European, and Japanese Use and Support for RISC-V

The U.S. Defense Advanced Research Projects Agency (DARPA) has long been involved in RISC-V. DARPA was an early promoter and implementor of RISC-V as it’s an open-source standard that therefore reduces the cost for its use in the development of advanced military systems. While DARPA is no longer a member of RISC-V, they (and other U.S. government agencies) are still engaged in RISC-V as they are using it as part of several government projects. For example, NASA’s Jet Propulsion Lab selected semiconductors that use RISC-V architecture (from the U.S. firm SiFive, see below) for its autonomous space mission project.

Fabricating semiconductors is an expensive and complicated process, and it is something small-and-medium-sized firms, academics, and smaller research labs can rarely afford. DARPA uses RISC-V to make this process cheaper and easier for stakeholders involved in the research, design, and evaluation of new semiconductors. RISC-V’s extensible nature also means it can be tailored for specialty processes and functions that lend themselves to defense applications and research. Similarly, the open nature of the standard lends itself to greater scrutiny and trust from a security perspective as it allows the government to build its own trusted implementation of RISC-V. To help address this issue, on March 31, 2021, DARPA signed an agreement with SiFive (a provider of commercial RISC-V processor intellectual property and silicon solutions) to gain access to intellectual property to create differentiated processor cores using the RISC-V ISA standard. In essence, it adds RISC-V to DARPA’s toolbox, making it simpler and cheaper for DARPA and its partners to access RISC-V without having to negotiate licensing and access agreements to other semiconductor architectures.

Firms and governments in the European Union (EU), India, and Japan are investing in RISC-V for many of the same reasons. For example, the EU is investing in efforts to support the development of RISC-V, in part, due to anxiety over EU member countries’ reliance on foreign companies for semiconductors. The Barcelona Supercomputer Center leads several RISC-V projects, including the European Processor Initiative and its Open Chip initiative to develop RISC-V semiconductor processors. The Japanese government-funded research group Leading-edge Semiconductor Technology Center is working with U.S. firm Tenstorrent to develop a RISC-V based semiconductor for its all-new edge 2 nanometer AI Accelerator. While these respective efforts in the EU and Japan are at a formative stage (in comparison to ARM and Intel’s x86), it shows that RISC-V is a standard with global interest.

The Impact if US Firms Can No Longer Participate in RISC-V

The China Select Committee’s letter to Secretary Raimondo asked what the Biden administration is doing to prevent China from achieving dominance in the RISC-V technology and leveraging that dominance at the expense of U.S. national and economic security. The reality is that if U.S firms can’t participate in RISC-V, it will still exist as a standard, and U.S. firms would still have to use it, but they would be forced to use one of the two other proprietary standards and wouldn’t be able to influence its future development. Calista Redmond, chief executive of RISC-V International, released a statement after the Select Committee’s letter to make this point clear: “RISC-V is here to stay. It has already grown tremendously in global adoption and influence as the open standard for compute… RISC-V is an open standard and has incorporated meaningful contributions from all over the world. As a global standard, RISC-V is not controlled by any single company or country.”

Prohibiting U.S. firms from participating would have several major disadvantages for U.S. firms and U.S. economic competitiveness and innovation.

First, preventing U.S. firms from participating in RISC-V will not lead to its demise. A likely scenario is that RISC-V fragments and U.S. firms are forced to use a U.S.-only RISC-V while the rest of the world uses the open, global version. It would likely lead to a “forking” of follow-on standards. This fragmentation and forking would undermine the enormous value that open global standards play in U.S. innovation and the ability of U.S. firms to seize global market share.

U.S. firms would face a technical market barrier as they would have to devote significant resources and expertise to developing already hugely expensive semiconductors to two different standards. Changing semiconductor architecture is a massive issue for U.S. firms (as it is for all firms involved in semiconductors) as it changes the fundamental design and implementation for semiconductors. U.S. firms would be disadvantaged in competing against Chinese firms and their products, which would benefit from the fact that they would still be involved in“rest-of-world” RISC-V, which would lend itself to better and quicker technical design and product development. Chinese firms would have an advantage in hardware design as they’d have a better understanding of the architecture that they’re building to for next generation semiconductors.

Second, it would likewise bifurcate the software development ecosystem for RISC-V, which would disadvantage U.S. firms and the U.S. market. Each architecture (whether Intel, ARM, or RISC-V) involves different software build tools and software compilers (a computer program that translates computer code written in one programming language into another language). One reason why RISC-V is not yet broadly used is that the software ecosystem is still nascent. However, it is growing. For example, on May 31, 2023, a group of companies (Andes, Google, Intel, Imagination Technologies, MediaTek, Nvidia, Qualcomm Technologies, Red Hat, Rivos, Samsung, SiFive, T-Head, and Ventana Micro Systems) formed the RISC-V Software Ecosystem (RISE) Project to support the development of relevant open-source software tools for RISC-V. In contrast, ARM and Intel have well-established software ecosystems. The RISE Project’s goal is to support RISC-V adoption and speed up implementation and time-to-market for RISC-V users. In a world with a bifurcated RISC-V standard, firms that build compilers and other software tools for semiconductors would have to decide which version they build for—the U.S.-only version or the rest-of-the-world version. Given the respective market sizes, it’s reasonable to expect they’d build for (or at least prioritize) the global market.

Third, prohibiting U.S. firms from participating in RISC-V would not only mean U.S. firms would not be able to contribute to the technical design of the relevant standard, but also, they’d lose visibility (and understanding) about discussions henceforth and why specialty instructions were determined in some specific way for certain features. This would provide a competitive advantage to non-U.S. firms. The strategic importance and longevity of semiconductor standards and architecture is critically important as technology providers rely on a single global standard to develop the relevant partnerships and supply chains as well as to provide their goods and services to a global (rather than fragmented) market.

Fourth, it would limit U.S. competition and innovation for semiconductor architectures to whatever Intel and ARM are doing. In contrast, China and others would also be able to benefit from developing and deploying RISC-V.

Conclusion

U.S. policymakers need to understand the finer points of semiconductor standards/architecture and implementation and where cooperation and competition take place between U.S. and Chinese firms. Policymakers can’t look at semiconductor standards/architecture in isolation. Semiconductor standards are a complex and long-term endeavor that involves a large and diverse ecosystem of firms, not just chip manufacturers, but users, such as Apple, Google, Microsoft, and countless others. The open nature of RISC-V, and the ecosystem of firms involved in it, means that no one controls it. This means that it’s difficult to apply sanctions and export controls to try and stop it. However, just as U.S. sanctions and export controls target key parts of the manufacturing of cutting-edge semiconductors, so too can they be applied to the manufacturing of RISC-V-based semiconductors.

It’s not clear which semiconductor architecture will lead the market in the future, but U.S. firms should be free to contribute to RISC-V as it is likely to play a role in future innovation. Fragmenting the RISC-V standard would undermine the enormous value that open global standards play in U.S. innovation and the ability of U.S. firms to use them to seize global market share. Given that this post analyzes the potential fragmentation of global semiconductor standards, it builds on an earlier ITIF post on how U.S. sanctions against Chinese firms have undermined U.S. technology, trade, and climate change goals in fracturing the standard for sever and datacenter energy efficiency.

If congress or the Biden administration sanctioned RISC-V, it would also essentially compromise the ability of U.S. firms to work with counterparts in likeminded allied countries to develop an open standard for a critical national and economic security technology. U.S policymakers, especially national security officials, should not automatically equate Chinese participation in technical standards with being a national security risk.